Gate drivers are used to drive switches used in high power applications, such as power MOSFETs, IGBTs, and bipolar transistors (BJTs).
A gate driver is basically a power amplifier that accepts a low-power input from a controller integrated circuit, and produces an appropriate high-power gate drive for a power switch.
Patent document U.S. Pat. No. 6,326,819 B1 discloses such a gate driver, which uses a current buffer comprising two switches to control the flow of electrical current to the gate of an IGBT from a positive and a negative power source, respectively. A control circuit is provided to control the switches between an ON and an OFF state.
Patent document U.S. Pat. No. 6,275,093 B1 discloses an IGBT gate driver circuit, which includes means for detecting when the collector-to-emitter voltage of a turned-on IGBT increases above a preset level, thus indicating a fault condition such as a short circuit. An analog circuit is provided which is adapted to sense such an increase in the collector-to-emitter voltage, and to respond by turning the IGBT off in two steps. First, the gate voltage is decreased to a level that is still above the threshold (turned-on) voltage of the IGBT, in order to decrease the current flowing through the IGBT. Then, the gate voltage is gradually decreased until the IGBT is completely turned off.
A similar circuit is disclosed in patent document U.S. Pat. No. 5,559,656, which describes a gate driver circuit for preventing switching voltage transients from damaging an IGBT during a shut off operation performed in response to a short circuit. Analog circuitry is disclosed which is adapted to decrease the rate of fall of gate voltage of the IGBT when a short circuit condition is sensed.
Patent application publication US 2008/0290911 A1 discloses a gate driver which is adapted to switch a power MOSFET between a fully-on condition and a low-current condition, instead of switching the MOSFET between fully-on and fully-off conditions. A feedback circuit may be used to ensure that the magnitude of current in the power MOSFET in its low-current condition is correct.
Patent application publication US 2007/0200613 A1 discloses a gate driver which includes: a drive circuit that applies a drive signal to the gate electrode of a power semiconductor switching device; and a measurement unit for measuring a flow current of the power semiconductor switching device. The drive circuit is adapted to adjust the gate voltage based on a detected value of the current flowing through the power semiconductor switching device.
Finally, patent application publication US 2008/0012622 A1 discloses a gate driver for a power switch, which can turn on and turn off the power switch by controlling the gate voltage of the switch. In particular, in a first period, the gate voltage of the switch can be driven to a first level, to cause the switch to close. In a second period, the gate voltage of the switch is disconnected from the voltage source, but the gate voltage remains sufficiently high for the switch to remain closed. In a third period, the gate of the switch is connected to ground, thus pulling the gate voltage low and causing the switch to open. The gate driver comprises driver logic, which may include a pulse width generator programmer and a pulse width generator. The pulse width generator causes the first, second and third periods described above to be repeated in succession, thus repeatedly closing and opening the switch at intervals inversely related to the frequency of the pulse. The gate driver may further include a feedback loop, coupled to the driver logic, so as to adjust the length of the period during which the switch is opened or closed.
Document U.S. Pat. No. 5,689,394 A describes gate voltage modulation for transistor fault conditions. The controller is capable of providing a command signal to the gate driver and pulse width modulating the command signal upon receiving a comparator signal from the gate driver to gradually switch off the power device. In one embodiment, the controller comprises a logic device such as a logic gate array which is capable of sending on/off switching signals, and a command signal is sent during the “on” intervals. In the event that the voltage between the outputs of the power device approaches a saturation level during a command signal interval, the controller includes a pulse width modulator which can modulate the command signal sent to the gate driver. The voltage can be controlled by selecting the appropriate pulse width modulation for the on/off switching of the voltage to gate driver.
A driver for a power semiconductor switch is disclosed in document DE 20 2010 015 965 U1. The driver comprises a switching output for coupling of a switching input of a power semiconductor switch. Moreover, the driver comprises a logics input for a logical switching signal as well as a converter converting the logic switch signal into a power signal. The power signal is a pulse-width modulated signal with a pre-settable duty cycle, and it is supplied to the switching output starting from the converter via an inductivity. Thereby, the duty cycle of the power signal can be changeable. By varying the duty cycle during the switching event, a specific loading/unloading curve can be set for the respectively coupled power semiconductor or even for individual switching events. Optionally, the converter may comprise a memory in which the duty cycle or various values therefor are storable. The memory is programmable so that, for example, after delivery of the driver to a customer, arbitrarily adjustable or programmable duty cycles can be programmed by the customer. Fixed duty cycles are thereby preset, which may optionally be switched.
The gate drivers which are known from the prior art have several limitations or disadvantages. The slew rate (also sometimes referred to as the “turn-on speed” or “turn-off speed”) of the switch cannot be adaptively changed during operation. This means that no adaptive timing of the switch is possible.
Many known gate drivers rely on resistor networks in order to control the delivery of gate current, which leads to large power dissipation during delivery of gate current.
Such drivers cannot be easily adapted to control the gate current or base current of the switch in response to changed parameters (temperature; load variation; abnormal operating conditions) or in case of abnormal system states (e.g. short circuits).
Moreover, flexible setting of a particular slew rate of the switch or the efficient implementation of a virtually unlimited number of slew patterns is not enabled by means described in the prior art.